Follow @Openwall on Twitter for new release announcements and other news
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <CANWtx00WP5eVgoWJkMRkpJBodBi38u6bfFgpH99KK7a0BGFhLA@mail.gmail.com>
Date: Tue, 26 Nov 2013 09:52:00 -0500
From: Rich Rumble <richrumble@...il.com>
To: john-users@...ts.openwall.com
Subject: Knights Landing

Now I am glad I waited!
http://newsroom.intel.com/community/intel_newsroom/blog/2013/11/19/chip-shot-at-sc13-intel-reveals-more-details-of-its-next-generation-intelr-xeon-phi-tm-processor

I am assuming however they aren't fitting the same power in one
die/chip... but eliminating the memory or bus bottle neck is a good
thing nonetheless. The PHI is still affordable, but since I don't have
any other purpose for all that power, having a CPU + PHI in one sounds
a bit better to me.
-rich

Powered by blists - more mailing lists

Confused about mailing lists and their use? Read about mailing lists on Wikipedia and check out these guidelines on proper formatting of your messages.